Design Capability

Cantilever, Vertical, Shelf, multidie, Burn-In, RF, Mother Boards, Driver Boards, Memory Modules, Back Planes, Regulator boards, and but not limited to High Current.

Teradyne, Agilent, LTXCredence, Advantest, Nptest, Mosaid, and Custom.


Kes, Aehr, Blue M, Lunaire, Gruenberg.


Our current capacity consists of 6 to 10 designs per month.

ATE PCB Design

Section Overview

Signal routing on ATE test boards follows different rules when compared to ‘standard’ design routing practices. For example, design layer counts are higher, T style and 90° routes are not allowed, crosstalk is determined by a signal’s distance to its reference plane, etc


Semiconductor test equipment is designed to deliver and receive high quality test signals to and from pogo pins, or connectors within the test head. From there, the signals are transferred to a PCB and become the responsibility of the designer to maintain their integrity. Knowledge of the interface between test systems and the PCB is essential in order to maintain a smooth transition from one medium to the other, and to assure the interface board will install properly. This section explores interface connection systems, design criteria, and the various tester resources that must be translated to the PCB, often through additional interfaces.

Design Restrictions

Mechanical interface

Planarization Mother Board. A PCB designed to adapt a probe card to a probe planarizer test system. The planarizer is utilized to verify needle alignment, and planarity. (Planarity

A spider card (also known as a daughter card) is a smaller version of a DIB designed to be mounted on a PIB, rather than directly to the test head. The use of a spider card instead of a full size DIB reduces the cost to the customer (due to its size), and provides the ability to leave a PIB installed on the tester, allowing easy replacement of spider cards for different products. Performance does suffer somewhat as compared to a full size DIB, because of the additional interface (the PIBs tower) that all signals must travel through.

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